This table is a copy of a handwritten note. I suspect it to be "Figure 11". Someone must have copied it by hand and it finally found the way to me as a x-th generation copy.
Even address | Odd address | TIME µsec | Comments | |||
0 1 2 3 | 4 5 6 7 | 8 9 10 11 | 12 13 14 15 | |||
MVM2 R2,R1 |
0 Logic |
DEST REG | SOURCE REG | 0 MOVE -2 |
3.97 (1.52) |
|
MVM1 R2, R1 |
1 MOVE -1 |
|||||
MVP1 R2, R1 |
2 MOVE +1 |
|||||
MVP2 R2, R1 |
3 MOVE +2 |
|||||
MOVE R2,R1 |
4 MOVE +0 |
|||||
AND R2, R1 |
5 AND Byte |
4.63 (1.72) |
||||
ORB R2, R1 |
6 OR |
|||||
XOR R2, R1 |
7 XOR |
|||||
ADD R2, R1 |
8 add |
|||||
SUB R2, R1 |
9 sub |
|||||
ADDS1 R2, R1 |
A add SPL#1 |
|||||
ADDS2 R2, R1 |
B add SPL#2 |
|||||
HTL R2, R1 |
C copy H->L |
|||||
LTH R2, R1 |
D copy L->H |
|||||
GETR DA,R1 |
Device address |
DEST REG | E GET to reg |
|||
GETA DA,R1 |
F GET&ADD |
|||||
CTL DA,## |
1 Control |
Device address |
Command | 2.65 (1.13) |
Command is user defined |
|
PUTB DA,R1,# |
4 Put Byte |
Address Reg | Address modifier
0-3: add 1-4 |
3.97 (2.05) |
|
|
GETB DA,R1,# |
E Get Byte |
4.63 (2.05) |
||||
LDHI R1,R2,# |
D indirect halfword fetch |
TO REG | ||||
LDBI R1,R2,# |
6 indirect byte fetch |
|||||
STHI R1,R2,# |
5 indirect halfword store |
FROM REG | ||||
STBI R1,R2,# |
7 indirect byte store |
|||||
LDHD R1,## |
2 direct halfword fetch |
TO REG | Address 256 halfwords | 3.97 (1.52) |
The high order register byte is stored/fetched at address * 2 |
|
STHD R1,## |
3 direct halfword store |
FROM REG | ||||
EMIT R1,## |
8 Emit |
TO REG | DATA/MASK byte |
2.65 (1.13) |
The high order register byte is unchanged except for carrys and borrows generated by the immediate operations |
|
CLRI R1,## |
9 Clear bit |
3.97 (1.52) |
||||
ADDI R1,## |
A Add immediate+1 |
|||||
SUBI R1,## |
F Sub immediate-1 |
FROM REG | ||||
SETI R1,## |
B Set bit |
TO REG | ||||
JHI/JLE R1,R2 |
C Jump |
DATA REG | MASK REG | 0 lower or equal |
5.30 (1.92) |
|
JHE/JLO R1,R2 |
1 lower |
|||||
JHL/JEQ R1,R2 |
2 equal |
|||||
JSB/JNO R1 |
3 no data bits |
|||||
JSN/JALL R1 |
4 all data bits |
|||||
JSNM/JALLM R1,R2 |
5 data = all mask bits |
|||||
JSM/JNOM R1,R2 |
6 data = no mask bits |
|||||
JHSNM/JHAM R1,R2 |
7 see note |
New instructions:
SHIFTR REG,1 | GETB 0, REG, | C = Shift right 1, fill with high order byte low bit | |
ROTR REG,1 | D = rotate right 1 | ||
ROTR REG,3 | E = rotate right 3 | 1.72 µsec | |
ROTR REG,4 | F = rotate right 4 |